Senior ASIC Architect, System Engineer, HW/SW Partitioning, Senior ASIC Designer, DSP algorithms implementation. Extensive knowledge in wired and wireless communication lower layers in Telecommunication and Automotive domains. PhD in Applied Computer Science at Slovak University of Technology STU in Bratislava, Slovakia. Thesis title: “WLAN Power Saving by Header Compression and Packet Overhearing Reduction”. Author of 10 patents and 7 scientific papers. I worked in Texas Instruments, Infineon and Alcatel, additionally to a few start up companies in computer communication....

Hello, I had completed my b.tech from IMS engineering college in[removed]currently i looking for job in electronics or VLSI field....

I am fresh graduates in Electrical Engineering and very career objective to work on freelancing as my profession permanently...

Data scientist, expert in Matlab, python....

Computer Literate Proficient in Microsoft Applications Knowledgeable on search engines and alike Decent typing speed Can communicate on english knowledgeable in electronics engineering and alike...

I am digital design engineer works in Synopsis as it is one of the biggest corporations in the world in digital design field. I am professional expert digital design engineer using verilog and making MATLAB and simulink models to verify my work before verification phase. I am professional in scripting as it is essential in digital design to automate the flows like python, tcl, bash and perl scripting. I specialized in web scraping and data analysis using python. I make many works before as I work on system design of NB-IOT receiver, and specialized in making tail bitting viterbi decoder with extreme low power consumption. CRC detection and Rate de-matching . I make other much more complicated works but it is highly confidential as it belongs to Synopsis....

Bachelor's in Engineering in Electronics and communication engineer with 1 year of Professional experience, seeking an entry level position in Digital RTL Verification. Hands on experience on verification of APB, SPI, Switch, basics of Ethernet with functional coverage and System Verilog Assertions based Verification. Strong knowledge of UVM verification methodology, Excellent knowledge in System Verilog, Digital design, CMOS fundamentals. Have worked on Industry Standard tools Synopsys VCS, Aldec Riviera Pro...

Hello, I am an engineering student who want to earn a little to become independent by using my skill of excellent typing speed online....

working professional in vlsi design.....

I am working in the VLSI design industry since last 10+years approximately. I am presently working for Intel India Pvt. Ltd., Bangalore, as Senior Design Lead. My experience focuses on: Both ASIC and FPGA flows. Digital Design RTL, RTL Micro architecture, Lint checking, CDC analysis, Synthesis, and automation through perl/shell scripts. Hands on tools VCS, DC-Ultra, Simplify Xilix-ISE and Spyglass....