
About Me
I’m an a FPGA RTL Design expert with hands on experience in design and implementation digital systems on intel and Xilinx AMD. I have total 6 years of industry experience in FPGA field as Design, Development, implementation, board bring up, also integration, testing and debugging.
Also Develop user free support with Hardware and GUI team.
Skills: VHDL, Verilog, FPGA RTL, CDC, RDC, timing closure, IP Development
Vivado, Quartus.
Xilinx IP experience in AXI, 1G/10G/40G Ethernet, JESD204, DDRMIG, Aurora etc…
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