

Gurugram, India
Design Verification Engineer
Local Time - 10:28 AM
About Me
Design Verification Engineer with hands on experience in verifying high speed interfaces like DisplayPort and PCIe Gen6 IPs. Skilled in SystemVerilog, UVM, and Verilog, I specialize in building robust and scalable verification environments.
I have strong knowledge of AXI, UART, SPI, and I2C protocols, with experience in developing testbenches, writing constrained random test scenarios, and ensuring protocol compliance and coverage driven verification. I am proficient in debugging RTL issues and creating reusable verification components.
I focus on delivering reliable, efficient, and well documented solutions, and I am open to freelance opportunities in RTL verification, testbench development, and protocol validation.
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