Bengaluru, India
VLSI,Verilog,VHDL,C,C++,Bash shell Scripting,perl,FPGA,ASIC
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About Me
Experience as Design & Verification Engineer.
• Proficient in languages:- Systemverilog, UVM, VHDL & Verilog.
• Programming:C, C++
• Proficient in tools:- Xilinx ISE, Modelsim 6.4a
• Protocols:-UART, PCIE.
• Scripting language:- Perl.
• Operating system: Windows OS, UNIX
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