The quest for instruction level parallelism (ILP) is on the&nbsp;decline as increasing design efforts are focused on multi core design also called chip multi processors (CMP). The&nbsp;cases for CMP and ILP are complementary. Some of latter attempts at achieving high ILP were cluster designs.&nbsp;The paper explores a hybrid model for achieving the advantages of both CMP and cluster design. The proposed&nbsp;hybrid approach runs in single processor as well as multi processor to achieve high ILP.

Clustered Chip Multi-Processor CCMP

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