Total 6+ Years of experience in Physical design from Netlist to GDS II including timing closure and signoff.
Physical design implementation, physical design strategies, and static timing analysis
Experience in Synopsys ICC2, Primetime and Cadence Physical Design EDA Tools
Expertise with Unix, C, Perl, TCL, AWK and SED Scripting Languages.
Expertise with Physical verification, DRC cleaning techniques
Expertise of EM techniques and SI reduction techniques.
Expertise with Low power Reduction Techniques
Expertise of IR Drop reduction techniques.
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