Delhi, India
M. Tech Student in the field of VLSI with proficiency in Verilog
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About Me
I am currently pursuing my master of technology from the Indian Institute of Technology Bombay IIT Bombay in the specialization of solid state devices. I have developed a unique profile comprising both technical and non technical/managerial aspects. To show my technical knowledge, I boast of a CPI of 8.62 and have already secured a job in Taiwan Semiconductor Manufacturing Company as a chip design engineer due to join in august 2022
I am proficient in Verilog and Digital Logic design, I have done projects such as Implementation of Brent Kung adder, Dadda multiplier, 2 system arbiter with FIFO synchronizer, optimization of LUT for memory based computation, and many more
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