
About Me
VLSI Engineer with expertise in Digital Design, RTL Development, ASIC Verification, and FPGA based system design. Skilled in Verilog, SystemVerilog, UVM, FPGA prototyping, simulation, debugging, and verification methodologies. Experienced in developing reliable and scalable digital hardware solutions with a strong understanding of ASIC design flow, timing analysis, and verification processes. Passionate about delivering high quality designs and collaborating on challenging semiconductor projects.
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